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TNY256
TinySwitch Plus
Energy Efficient, Low Power Off-line Switcher
Product Highlights
TinySwitch Plus Features * Extended power range * Fully integrated auto-restart reduces short circuit current * Line under-voltage sense eliminates turn-off glitches * Frequency jittering dramatically reduces EMI (5 to 10 dB) * TO-220 package option
Lowest Cost, Low Power Switcher Solution * Lower cost than RCC, discrete PWM and other integrated/ hybrid solutions * Cost effective replacement for bulky linear adapters * Lowest component count * Simple ON/OFF control - no loop compensation components * No bias winding - simpler, lower cost transformer * Designed to work with low cost external components
+
Optional UV Resistor
TM
+ DC Output -
Wide-Range HV DC Input
D
EN/UV BP
TinySwitch Plus
S
-
PI-2363-022699
Figure 1. Typical Standby Application.
OUTPUT POWER CAPABILITY*
ORDER PART NUMBER TNY256P TNY256G TNY256Y PACKAGE DIP-8 SMD-8 TO-220-7B 8-19 W 5-11 W
230 VAC or 115 VAC w/Doubler 85-265 VAC
Extremely Energy Efficient * Consumes only 30/60 mW at 115/230 VAC with no load * Meets Blue Angel, Energy Star, Energy 2000 and 200mW European cell phone requirements for standby * Saves $1 to $4 per year in energy costs (at $0.12/kWHr) compared to bulky linear adapters * Ideal for cellular phone chargers and adapters High Performance at Low Cost * High voltage powered - ideal for charger applications * High bandwidth provides fast turn on with no overshoot * Current limit operation rejects line frequency ripple * Built-in current limit and thermal protection
8-15 W
5-10 W
Table 1. * The low end of the power ranges shown represent enclosed adapters with minimal heat sinking whereas, the high end of the power ranges represent open frame power supplies with adequate heat sinking, both measured at an ambient of 50 oC. Please refer to the Key Application Considerations section for more details.
Description
The TNY256 extends the power range of the TinySwitch family of energy efficient, low power off-line switchers. TinySwitch devices use a breakthrough design to provide the lowest cost, high efficiency, off-line switching solution for low power applications. They integrate a 700 V power MOSFET, oscillator, high voltage switched current source, current limit and thermal shutdown circuitry into a single, monolithic device. The devices start-up and operate on power derived from the DRAIN voltage, eliminating the need for a transformer bias winding and associated circuitry. TinySwitch's low operating current allows power supply no-load consumption to be kept under 100 mW, even at 265 VAC input.
The TinySwitch Plus incorporates auto-restart, line under-voltage sense, and frequency jittering features. The auto-restart circuit safely limits output power during fault conditions such as output short or open loop. The auto-restart circuit is fully integrated and does not require external timing components. The line undervoltage sense threshold can be externally programmed using a line sense resistor. During start-up, this feature keeps the TNY256 off until the input line voltage reaches the under-voltage threshold. When the input line voltage is removed, the line under-voltage circuit prevents auto-restart attempts after the output goes out of regulation. This eliminates power down glitches caused by the slow discharge of input storage capacitors present in applications such as standby supplies. A single resistor is used to implement this feature, eliminating what normally takes five to six components. The line sense resistor is optional. The TNY256 operating frequency of 130 kHz is jittered (frequency modulated) to reduce both quasipeak and average EMI, minimizing filtering costs.
August 1999
TNY256
BYPASS (BP)
REGULATOR 5.8 V LINE UNDER-VOLTAGE
50 A
DRAIN (D)
AUTORESTART COUNTER
CLOCK RESET 5.8 V 5.1 V
BYPASS PIN UNDER-VOLTAGE
+ -
+ JITTER CLOCK 1.5 V + VTH DCMAX
VI
LIMIT
THERMAL SHUTDOWN
OSCILLATOR ENABLE/ UNDER-VOLTAGE (EN/UV)
1.5 V
S Q
R
Q
LEADING EDGE BLANKING
SOURCE (S)
PI-2367-122398
Figure 2. Functional Block Diagram.
Pin Functional Description
DRAIN (D) Pin: Power MOSFET drain connection. Provides internal operating current for both start-up and steady-state operation. BYPASS (BP) Pin: Connection point for a 0.1 F external bypass capacitor for the internally generated 5.8 V supply. ENABLE/UNDER-VOLTAGE (EN/UV) Pin: This pin has dual functions, enable input and line under-voltage sense. During normal operation, switching of the power MOSFET is controlled by this pin. MOSFET switching is terminated when a current greater than 50 A is drawn out of this pin. This pin also senses line under-voltage conditions through an external resistor connected to the DC line voltage. If there is no external resistor connected to this pin, TNY256 detects this and disables the line under-voltage function. SOURCE (S) Pin: Power MOSFET source connection. Primary return.
Tab Internally Connected to Source Pin
7D 5 NC 4S 3 BP 1 EN/UV
TO-220 (YO7B)
BP S S EN/UV
1 2 3 4 8 7 6 5
S S S D
DIP-8 (PO8A) SMD-8 (GO8A)
PI-2500-072199
Figure 3. Pin Configuration.
NO CONNECT (N) Pin No connection.
2
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TNY256
TinySwitch Functional Description
TinySwitch combines a high voltage power MOSFET switch with a power supply controller in one device. Unlike conventional PWM (Pulse Width Modulator) controllers, TinySwitch uses a simple ON/OFF control to regulate the output voltage. The TNY256 controller consists of an Oscillator, Enable (Sense and Logic) circuit, 5.8 V Regulator, Bypass pin Under-Voltage circuit, Over Temperature Protection, Current Limit circuit, Leading Edge Blanking and a 700 V power MOSFET. The TNY256 incorporates additional circuitry for Line Under-Voltage Sense, Auto-Restart and Frequency Jitter. Figure 2 shows the functional block diagram with the most important features. Oscillator The typical oscillator frequency is internally set to an average of 130 kHz. Two signals are generated from the oscillator, the Maximum Duty Cycle signal (DCMAX) and the Clock signal that indicates the beginning of each cycle. The TNY256 oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 5 kHz peak-to-peak, to minimize EMI emission. The modulation rate of the frequency jitter (1 kHz) is set to optimize EMI reduction for both average and quasi-peak emissions. The frequency jitter should be measured with the oscilloscope triggered at the falling edge of the DRAIN waveform. The waveform in Figure4 illustrates the frequency jitter of the TNY256. Enable Input Circuit The enable input circuit at the EN/UV pin consists of a low impedance source follower output set at 1.5 V. The current through the source follower is limited to 50 A with 10 A of hysteresis. When the current drawn out of the this pin exceeds
PI-2366-021299
50 A, a low logic level (disable) is generated at the output of the enable circuit. This output is sampled at the beginning of each cycle on the rising edge of the clock signal. If high, the power MOSFET is turned on for that cycle (enabled), otherwise the power MOSFET remains off (disabled). Since the sampling is done only at the beginning of each cycle, subsequent changes in the EN/UV pin voltage or current during the remainder of the cycle are ignored. Under most operating conditions (except when close to noload), the low impedance of the source follower, keeps the voltage on the EN/UV pin from going much below 1.5 V, in the disabled state. This improves the response time of the optocoupler that is usually connected to this pin. 5.8 V Regulator The 5.8 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.8 V by drawing a current from the voltage on the DRAIN, whenever the MOSFET is off. The BYPASS pin is the internal supply voltage node for the TinySwitch. When the MOSFET is on, the TinySwitch runs off of the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows the TinySwitch to operate continuously from the current drawn from the DRAIN pin. A bypass capacitor value of 0.1 F is sufficient for both high frequency de-coupling and energy storage. BYPASS Pin Under-Voltage The BYPASS pin under-voltage circuitry disables the power MOSFET when the BYPASS pin voltage drops below 5.1 V. Once the BYPASS pin voltage drops below 5.1 V, it must rise back to 5.8 V to enable (turn-on) the power MOSFET. Over Temperature Protection The thermal shutdown circuitry senses the die temperature. The threshold is set at 135 oC with 70 oC hysteresis. When the die temperature rises above this threshold (135 oC) the power MOSFET is disabled and remains disabled until the die temperature falls by 70 oC, at which point it is re-enabled. Current Limit The current limit circuit senses the current in the power MOSFET. When this current exceeds the internal threshold (ILIMIT), the power MOSFET is turned off for the remainder of that cycle. The leading edge blanking circuit inhibits the current limit comparator for a short time (tLEB) after the power MOSFET is turned on. This leading edge blanking time has been set so that current spikes caused by primary-side capacitance and secondary-side rectifier reverse recovery time will not cause premature termination of the switching pulse. Auto-Restart In the event of a fault condition such as output overload, output
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600 500 400 300 200 100 0 132.5 kHz 127.5 kHz
V
DRAIN
0
.5
1
Time (s) Figure 4. Frequency Jitter.
3
TNY256
short, or an open loop condition, TNY256 enters into autorestart operation. An internal counter clocked by the oscillator gets reset every time the EN/UV pin is pulled low. If the EN/ UV pin is not pulled low for 32 ms, the power MOSFET switching is disabled for 128 ms (except in the case of line under-voltage condition). The auto-restart alternately enables and disables the switching of the power MOSFET until the fault condition is removed. Figure 5 illustrates auto-restart circuit operation in the presence of a temporary output short. In the event of line under-voltage condition, the switching of the power MOSFET is disabled beyond its normal 128 ms time until the line under-voltage condition goes away. Line Under-Voltage (UVLO) Sense Circuit The DC line voltage can be monitored by connecting an external resistor from the DC line to the EN/UV pin. During power-up or when the switching of the power MOSFET is disabled in auto-restart, the current into the EN/UV pin must exceed 50 A to initiate switching of the power MOSFET. During power-up, this is implemented by holding the BYPASS pin to 5.1 V while the line under-voltage condition exists. The BYPASS pin then rises from 5.1 V to 5.8V when the line undervoltage condition goes away. When the switching of the power MOSFET is disabled in auto-restart mode and the line undervoltage condition exists, the counter is stopped. This stretches the disable time beyond its normal 128ms until the line undervoltage condition goes away. The line under-voltage circuit also detects when there is no external resistor connected to the EN/UV pin. In this case the line under-voltage function is disabled.
PI-2342-121198
300 200 100 0 20 10 0
DRAIN VOLTAGE
OUTPUT VOLTAGE
0
250
500
Time (ms) Figure 5. TNY256 Auto-Restart Operation.
TinySwitch Operation
TinySwitch devices operate in the current limit mode. When enabled, the oscillator turns the power MOSFET on at the beginning of each cycle. The MOSFET is turned off when the current ramps up to the current limit. The maximum on-time of the MOSFET is limited to DCMAX by the oscillator. Since the current limit and frequency of the TNY256 is constant, the power delivered is proportional to the primary inductance of the transformer and is relatively independent of the input voltage. Therefore, the design of the power supply involves calculating the primary inductance of the transformer for the maximum power required. If the TNY256 is appropriately chosen for the
V EN CLOCK
V EN CLOCK
D
MAX
D
MAX
I DRAIN
I DRAIN
V DRAIN
V DRAIN
PI-2373-120998
PI-2377-120998
Figure 6. TNY256 Operation at Heavy Load.
Figure 7. TNY256 Operation at Light Load.
4
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TNY256
PI-2383-122398
PI-2381-122398
200 100 0 10 5 0 400 200 0 0 1
200 100 0 10
V
DC-BUS
V
DC-BUS
V
BYPASS
5 0 400
V
BYPASS
V
DRAIN
2
200 0 0
V DRAIN
1 2
Time (ms) Figure 8. TNY256 Power-up With External Resistor (2 M) Connected to EN/UV Pin.
Time (ms)
Figure 9. TNY256 Power-up Without External Resistor Connected to EN/UV Pin.
power level at the lowest input voltage, the calculated inductance will ramp up the current to the current limit before the DCMAX limit is reached. Enable Function TNY256 senses the EN/UV pin to determine whether or not to proceed with the next switch cycle as described earlier. Once a cycle is started, it always completes the cycle (even when the EN/UV pin changes state half way through the cycle). This operation results in a power supply whose output voltage ripple is determined by the output capacitor, amount of energy per switch cycle and the delay of the feedback. The EN/UV pin signal is generated on the secondary by comparing the power supply output voltage with a reference voltage. The EN/UV pin signal is high when the power supply output voltage is less than the reference voltage. In a typical implementation, the EN/UV pin is driven by an optocoupler. The collector of the optocoupler transistor is connected to the EN/UV pin and the emitter is connected to the SOURCE pin. The optocoupler LED is connected in series with a Zener across the DC output voltage to be regulated. When the output voltage exceeds the target regulation voltage level (optocoupler diode voltage drop plus Zener voltage), the optocoupler diode will start to conduct, pulling the EN/UV pin low. The Zener can be replaced by a TL431 device for improved accuracy. The EN/UV pin pull-down current threshold is nominally 50 A, but is set to 40 A the instant the threshold is exceeded. This is reset back to 50 A when the EN/UV pull-down current drops below the current threshold of 40 A.
ON/OFF Control The internal clock of the TNY256 runs all the time. At the beginning of each clock cycle, it samples the EN/UV pin to decide whether or not to implement a switch cycle. If the EN/ UV pin is high (< 40 A), then a switching cycle takes place. If the EN/UV pin is low (greater than 50 A) then no switching cycle occurs, and the EN/UV pin status is sampled again at the start of the subsequent clock cycle. At full load, TNY256 will conduct during the majority of its clock cycles (Figure6). At loads less than full load, it will "skip" more cycles in order to maintain voltage regulation at the secondary output. At light load or no load, almost all cycles will be skipped (Figure7). A small percentage of cycles will conduct to support the power consumption of the power supply. The response time of the TNY256 ON/OFF control scheme is very fast compared to normal PWM control. This provides tight regulation and excellent transient response. Power Up/Down The TNY256 requires only a 0.1 F capacitor on the BYPASS pin. Because of the small size of this capacitor, the power-up delay is kept to an absolute minimum, typically 0.3 ms. Due to the fast nature of the ON/OFF feedback, there is no overshoot at the power supply output. When an external resistor (2 M) is connected to the EN/UV pin, the power MOSFET switching will be delayed during power-up until the DC line voltage exceeds the threshold (100 V). Figures 8 and 9 illustrate the power-up timing waveform of TNY256 in applications with and without an external resistor (2 M) connected to the EN/UV pin. During power-down, when an external resistor is used, the
B 8/99
5
TNY256
PI-2348-010599
200 100 0 400 300 200 100 0 0 .5
200 100 0 400 300
V DC-BUS
V
DC-BUS
V DRAIN
200 100 0
V
DRAIN
1
0
2.5
5
Time (s) Figure 10. Normal Power-down Timing.
Time (s)
Figure 11. Slow Power-down Timing with External (2 M) Resistor Connected to EN/UV Pin.
power MOSFET will switch for 32 ms after the output loses regulation. The power MOSFET will then remain off without any glitches since the under-voltage function prohibits restarts when the line voltage is low. Figure 10 illustrates a typical power-down timing waveform of TNY256. Figure 11 illustrates a very slow power-down timing waveform of TNY256 as in standby applications. The external resistor (2 M) is connected to the EN/UV pin in this case to prevent restarts. The TNY256 does not require a bias winding to provide power to the chip, because it draws the power directly from the DRAIN pin (see Functional Description above). This has two main benefits. First, for a nominal application, this eliminates the cost of an extra bias winding and associated components. Secondly, for charger applications, the current-voltage characteristic often allows the output voltage to fall to low values while still delivering power. This type of application normally requires a forward-bias winding which has many more associated components, none of which are necessary with the TNY256. Current Limit Operation Each switching cycle is terminated when the DRAIN current reaches the current limit of the TNY256. For a given primary inductance and input voltage, the duty cycle is constant. However, the duty cycle does change inversely with the input voltage providing "voltage feed-forward" advantages: good line ripple rejection and relatively constant power delivery independent of the input voltage. BYPASS Pin Capacitor The BYPASS pin uses a small 0.1 F ceramic capacitor for decoupling the internal power supply of the TNY256.
Application Example
The TNY256 is ideal for low cost, high efficiency power supplies in a wide range of applications such as PC standby, cellular phone chargers, AC adapters, motor control, appliance control and ISDN network termination. The 130 kHz operation allows the use of a low cost EE16 core transformer while still providing good efficiency. The frequency jitter in TNY256 makes it possible to use a single inductor (or two small resistors if lower efficiency is acceptable) in conjunction with two input capacitors for input EMI filtering up to the 10W level. The auto-restart function allows the design to be optimized for maximum efficiency without consideration for short-circuit current on the secondary. For applications requiring undervoltage lockout (UVLO), the TNY256 eliminates several components and saves cost. As an example, Figure12 shows a 9 V, 0.6 A, AC adapter operating from a universal input range (85-265 VAC). The AC input is rectified and filtered by D1-D4, C1 and C2 to create a high voltage DC bus which is connected to T1. Inductor L1 forms a pi-filter in conjunction with C1 and C2. The resistor R1 damps resonance in inductor L1. The frequency jitter in TNY256 allows it to meet worldwide conducted EMI standards using a simple pi-filter in combination with a small value Y1-capacitor C5 and a shield winding between primary and secondary windings inside transformer T1. Diode D5, capacitor C3 and resistor R3 form an RCD clamp circuit that limits the turn-off voltage spike to a safe value on the TNY256 DRAIN pin. The secondary winding is rectified and filtered by D6, C6 and C7 to provide the 9 V output. Additional filtering is provided by L3 and C8. The output voltage is determined by the resistor network R7 and R8. Resistor R9 maintains a bias current
6
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PI-2395-010599
TNY256
T1 NC 2 L1 470 H C3 10 nF D1 D2 1N4005 1N4005 R1 4.7 K D6 MBR360
1 10
L3 18 H C7 330 F 16 V C8 220 F 10 V
R3 8 4 330 K D5 TinySwitch Plus 1/4 W 1N4937 D
EN/UV BP S
C6 330 F 16 V
+9V 0.6 A RTN
U1 TNY256P 85-265 VAC RF1 10 Fusible C1 10 F 400 V C2 10 F 400 V
R5 100
R9 470 C11 0.1 F
R7 26.1 K
U2 SFH615-2 C4 0.1 F
D3 D4 1N4005 1N4005
U3 TL431CLP
R8 10 K
C5 2200 pF Y1 Safety
PI-2502-072699
Figure 12. 5.5 W AC Adaptor with Universal Input (85-265 VAC).
through the TL431 voltage reference for proper regulation. Capacitor C11 bypasses the TL431 response for improved ripple performance. Resistor R5 determines the AC gain of the circuit.
Key Application Considerations
For the most up to date information visit our website at: www.powerint.com Design Output Power Table 1 shows the practical maximum continuous output power levels obtainable under following conditions: 1. The minimum DC input voltage is 90 V or higher for 85 VAC input or 240 V or higher for 230VAC input or 115 VAC input with a voltage doubler. This corresponds to a filter capacitor of 3 F/W for universal input and 1 F/W for 230 or 115 VAC w/doubler input. 2. A secondary output of 5 V with a Schottky rectifier diode. 3. The P and G packaged parts are board mounted with source pins soldered to sufficient area of copper and the Y packaged parts are heat sinked sufficiently to keep the die temperature at or below 100 oC.
The maximum power capability of TinySwitch in a given application depends on the thermal environment (sealed enclosure, ventilated, open frame, etc.,), transformer core size and design (continuous or discontinuous), efficiency required, minimum specified input voltage, input storage capacitance, output voltage, output diode forward drop, etc., and can be different from the values shown in Table 1. Audible Noise At loads other than maximum load, the cycle skipping mode operation used in TinySwitch can generate audio frequency components in the transformer. This can cause the transformer to produce audio noise. Transformer audible noise can be reduced by using appropriate transformer construction techniques and decreasing the peak flux density. For more information on audio suppression techniques, please check the Application Notes section on our web site at www.powerint.com. Ceramic capacitors that use dielectrics such as Z5U, when used in clamp and snubber circuits, can also generate audio noise due to electrostriction and piezo-electric effects. If this is the case, replacing them with a capacitor having a different type of dielectric is the simplest solution. Polyester film capacitors and ceramic capacitors with dielectrics such as NPO or X7R are good alternatives.
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7
TNY256
Layout Single Point Grounding Use a single point ground connection at the SOURCE pin for the BYPASS pin capacitor and the Input Filter Capacitor (see Figure 13). Primary Loop Area The area of the primary loop that connects the input filter capacitor, transformer primary and TinySwitch together, should be kept as small as possible. Primary Clamp Circuit A clamp or snubber circuit is used to minimize peak voltage and ringing on the DRAIN pin at turn-off. This can be achieved by using an RC snubber for less than 3 W or an RCD clamp as shown in Figure 13 for higher power. A Zener and diode clamp across the primary or a single 550V Zener clamp from DRAIN to SOURCE can also be used. In all cases care should be taken to minimize the circuit path from the snubber/clamp components to the transformer and TinySwitch. Thermal Considerations Copper underneath the TinySwitch acts not only as a single point ground, but also as a heatsink. The hatched area shown in Figure13 should be maximized for good heat-sinking of TinySwitch and output diode. EN/UV pin layout optimization The EN/UV pin connection to the opto-coupler should be kept to an absolute minimum (less than 0.5 in.), and this connection should be kept away from the DRAIN pin (minimum of 0.2 in.). These distance limitations are critical only in applications where an external under-voltage resistor (2 M) is not used.
Safety Spacing Input Filter Capacitor Transformer + HV PRI - SEC Output Filter Capacitor
Y-Capacitor The placement of the Y-capacitor should be directly from the primary single point ground to the common/return terminal on the secondary side. Such placement will maximize the EMI benefit of the Y-capacitor. Optocoupler It is important to maintain the minimum circuit path from the optocoupler transistor to the TinySwitch EN/UV and SOURCE pins to minimize noise coupling. Output Diode For best performance, the area of the loop connecting the secondary winding, the Output Diode and the Output Filter Capacitor, should be minimized. See Figure13 for optimized layout. In addition, sufficient copper area should be provided at the anode and cathode terminals of the diode to adequately heatsink the diode under output short circuit conditions. Input and Output Filter Capacitors There are constrictions in the traces connected to the input and output filter capacitors. These constrictions are present for two reasons. The first is to force all the high frequency currents to flow through the capacitor (if the trace were wide then it could flow around the capacitor). Secondly, the constrictions minimize the heat transferred from the TinySwitch to the input filter capacitor and from the secondary diode to the output filter capacitor. The common/return (the negative output terminal in Figure13) terminal of the output filter capacitor should be connected with a short, low resistance path to the secondary winding. In addition, the common/return output connection should be taken directly from the secondary winding pin and not from the Y-capacitor connection point.
S D
TOP VIEW
TinySwitch
Y1Capacitor
-
DC + Out
CBP BP S EN/UV
Optocoupler
Maximize hatched copper areas ( ) for optimum heat sinking
PI-2360-012199
Figure 13. Recommended PC Layout for TinySwitch without Under-Voltage Lock Out Resister.
8
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TNY256 ABSOLUTE MAXIMUM RATINGS(1)
DRAIN Voltage ....................................... - 0.3 V to 700 V Peak DRAIN Current ............................................. 800 mA EN/UV Voltage ............................................ - 0.3 V to 9 V EN/UV Current ...................................................... 100 mA 1. All voltages referenced to SOURCE, TA = 25 C. 2. Normally limited by internal circuitry. BYPASS Voltage .......................................... -0.3 V to 9 V Storage Temperature ..................................... -65 to 125 C Operating Junction Temperature(2) ................ -40 to 150 C Lead Temperature(3) ................................................ 260 C 3. 1/16" from case for 5 seconds.
THERMAL IMPEDANCE
Thermal Impedance: Y Package (JA)(1) ............... 70 C/W (JC)(2) ................. 2 C/W P/G Package: (JA) ........ 45 C/W(3); 35 C/W(4) (JC)(2) ............................ 5 C/W 1. Free standing with no heatsink. 2. Measured at tab closest to plastic interface or source pin. 3. Soldered to 0.36 sq. inch (232mm2), 2oz (610 gm/m2) copper clad. 4. Soldered to 1 sq. inch (645mm2), 2oz. (610 gm/m2) copper clad
Conditions Parameter Symbol
SOURCE = 0 V; Tj = -40 to 125 C See Figure 14 (Unless Otherwise Specified)
Min
Typ
Max
Units
CONTROL FUNCTIONS Output Frequency Maximum Duty Cycle EN/UV Pin Turnoff Threshold Current EN/UV Pin Hysteresis Current EN/UV Pin Voltage EN/UV ShortCircuit Current
fOSC DCMAX IDIS IHYS VEN IENSC IS1 Tj = 25 C See Figure 4 Average Peak-Peak Jitter S1 Open Tj = -40 C to 125 C Tj = 125 C See Note 1 IEN/UV = -25 A IEN/UV = 25 A VEN/UV = 0 V, Tj = -40 C to 125 C VEN/UV = 0 V, Tj = 125 C VEN/UV = 0 V (MOSFET Not Switching) See Note 2 EN/UV Open (MOSFET Switching) See Note 2, 3 VBP = 0 V, Tj = 25 C See Note 4,5 VBP = 4 V, Tj = 25 C See Note 4,5 -7.50 115 3.8 63 -68 -68 -15 1.10 1.85 -58 -58 130 5.0 66 -50 -52 -10 1.45 2.70 -40 -45 170 140 6.2 69 -28 -41 -5 1.80 3.25 -25 -35 215 V A A A kHz
% A A
DRAIN Supply Current
IS2 ICH1
255
300
-5.50
-3.75
BYPASS Pin Charge Current
mA
ICH2
-6.00
-4.10
-2.25
mA
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9
TNY256 Conditions Parameter Symbol
SOURCE = 0 V; Tj = -40 to 125 C See Figure 14 (Unless Otherwise Specified)
Min
Typ
Max
Units
CONTROL FUNCTIONS (cont.) BYPASS Pin Voltage BYPASS Hysteresis EN/UV Pin Line Under-voltage Threshold
VBP VBPH ILUV See Note 4 5.60 0.60 Tj = 25 C 5.85 0.72 6.10 0.85 V V A
44
50
55
CIRCUIT PROTECTION Current Limit Initial Current Limit Leading Edge Blanking Time Current Limit Delay Thermal Shutdown Temperature Thermal Shutdown Hysteresis OUTPUT ON-State Resistance OFF-State Leakage Breakdown Voltage Rise Time Fall Time
RDS(ON) IDSS ID = 50 mA Tj = 25 C Tj = 100 C 15.6 25.7 18.0 30.0 50 A ILIMIT di/dt = 120 mA/s, Tj = 25 C See Note 7 See Figure 17 Tj = 25 C Tj = 25 C See Note 8 Tj = 25 C See Note 8, 9 125 450 0.65 x lLIMIT(MIN) 170 215 500 550 mA
IINIT
mA
tLEB tILD
ns
100
150
ns C C
135
145
70
VBP = 6.2 V, VEN/UV = 0 V, VDS = 560 V, Tj = 125 C VBP = 6.2 V, VEN/UV = 0 V, IDS = 100 A, Tj = 25 C 700
BVDSS tr tf
V ns
50 Measured in a Typical Flyback Converter Application. 50
ns
10
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TNY256 Conditions Parameter Symbol
SOURCE = 0 V; Tj = -40 to 125 C See Figure 14 (Unless Otherwise Specified)
Min
Typ
Max
Units
OUTPUT (cont.) DRAIN Supply Voltage Output EN/UV Delay Output Disable Setup Time Auto-Restart, ON-Time Auto-Restart Duty Cycle
tEN/UV tDST tAR Tj = 25 C See Note 9 See Note 8 50 V s s
10
0.5
28.9
32.0
35.2
ms
DCAR
16
20
24
%
NOTES: 1. For a threshold with a negative value, negative hysteresis is a decrease in magnitude of the corresponding threshold. 2. Total current consumption is the sum of IS1 and IDSS when EN/UV pin is shorted to ground (MOSFET not switching) and the sum of IS2 and IDSS when EN/UV pin is open (MOSFET switching). 3. Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the DRAIN. An alternative is to measure the BYPASS pin current at 6.2 V. 4. BYPASS pin is not intended for sourcing supply current to external circuitry. 5. See typical performance characteristics section for BYPASS pin start-up charging waveform. 6. For current limit at other di/dt values, refer to current limit vs. di/dt curve under typical performance characteristics. 7. This parameter is derived from characterization. 8. This parameter is derived from the change in current limit measured at 5X and 10X of the di/dt shown in the ILIMIT specification. 9. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency).
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11
TNY256
470 5W 470
D EN/UV S S S S S BP
S2
S1 2 M 50 V 10 V 0.1 F 150 V
NOTE: This test circuit is not applicable for current limit or output characteristic measurements.
PI-2352-011899
Figure 14. TinySwitch General Test Circuit.
t2 t1
DCMAX
(internal signal) tP
90%
HV DRAIN VOLTAGE
90%
EN/UV
D=
10%
t1 t2
VDRAIN
tP = 1 fOSC
tEN/UV
0V
PI-2048-050798
PI-2364-012699
Figure 15. TinySwitch Duty Cycle Measurement.
Figure 16. TinySwitch Output Enable Timing.
1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0
tLEB (Blanking Time)
DRAIN Current (normalized)
IINIT(MIN) ILIMIT(MAX) @ 25 C ILIMIT(MIN) @ 25 C
1
2
3
4
5
6
7
8
Time (s) Figure 17. Current Limit Envelope.
12
B 8/99
PI-2362-012699
TNY256
Typical Performance Characteristics
BREAKDOWN vs. TEMPERATURE
PI-2213-051198
FREQUENCY vs. TEMPERATURE
PI-2356-011899
1.1
1.2 1.0
Breakdown Voltage (V) (Normalized to 25C)
Output Frequency
-50 -25 0 25 50 75 100 125 150
0.8 0.6 0.4 0.2
1.0
0.9
0 -50 -25 0 25 50 75 100 125
Junction Temperature (C)
Junction Temperature (C)
CURRENT LIMIT vs. TEMPERATURE
PI-2354-011899
CURRENT LIMIT vs. di/dt
Current Limit (Normalized to 120 mA/s)
PI-2234-082798
1.4 1.2
1.4 1.2 1.0 0.8 0.6 0.4 0.2
Current Limit (A) (Normalized to 25C)
1.0 0.8 0.6 0.4 0.2
0.0 -50 -25
0 25 50 75 100 125
0.0 0
240 480 720 960
1200
Temperature (C)
di/dt in mA/s
BYPASS PIN START-UP WAVEFORM
PI-2240-082898
OUTPUT CHARACTERISTIC
PI-2385-121798
7
600 500
TCASE=25C TCASE=100C
BYPASS Pin Voltage (V)
6 5 4 3 2 1 0
Drain Current (mA)
400 300 200 100 0
0
0.2
0.4
0.6
0.8
1.0
0
2
4
6
8
10
Time (ms)
DRAIN Voltage (V)
B 8/99
13
TNY256
Typical Performance Characteristics (cont.)
COSS vs. DRAIN VOLTAGE
PI-2387-121798
DRAIN CAPACITANCE POWER
PI-2389-121798
100
100
DRAIN Capacitance (pF)
80
Power (mW)
0 200 400 600
60
10
40
20
1
0 0 200 400 600
DRAIN Voltage (V)
DRAIN Voltage (V)
UNDERVOLTAGE THRESHOLD
PI-2358-012099
80
Input Voltage (VAC)
40
Power-up* Power-down at 8 W**
* 2 M resistor connected to EN/UV pin. ** Load dependant and determined by the level of the device upon entering auto-restart.
0 -40 -20 0 20 40 60 80 100 110
Temperature (C)
14
B 8/99
TNY256
Notes
B 8/99
15
TNY256
Notes
16
B 8/99
TNY256
Notes
B 8/99
17
TNY256
P08A
DIM A B C G H J1 J2 K L M N P Q inches 0.370-0.385 0.245-0.255 0.125-0.135 0.015-0.040 0.120-0.135 0.060 (NOM) 0.014-0.022 0.010-0.012 0.090-0.110 0.030 (MIN) 0.300-0.320 0.300-0.390 0.300 BSC mm
8
Plastic DIP-8
D S .004 (.10)
5
9.40-9.78 6.22-6.48 3.18-3.43 0.38-1.02 3.05-3.43 1.52 (NOM) 0.36-0.56 0.25-0.30 2.29-2.79 0.76 (MIN) 7.62-8.13 7.62-9.91 7.62 BSC
-E-
B
1
4
A M J1
-DN
Notes: 1. Package dimensions conform to JEDEC specification MS-001-AB for standard dual in-line (DIP) package .300 inch row spacing (PLASTIC) 8 leads (issue B, 7/85).. 2. Controlling dimensions are inches. 3. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 4. D, E and F are reference datums on the molded body.
C
-FG J2 L H K Q P
PI-2076-031197
G08A
DIM A B C G H J1 J2 J3 J4 K L M P inches 0.370-0.385 0.245-0.255 0.125-0.135 0.004-0.012 0.036-0.044 0.060 (NOM) 0.048-0.053 0.032-0.037 0.007-0.011 0.010-0.012 0.100 BSC 0.030 (MIN) 0.372-0.388 0-8 mm 9.40-9.78 6.22-6.48 3.18-3.43 0.10-0.30 0.91-1.12 1.52 (NOM) 1.22-1.35 0.81-0.94 0.18-0.28 0.25-0.30 2.54 BSC 0.76 (MIN) 9.45-9.86 0-8
D S .004 (.10)
8 5
Plastic SMD-8
-E-
B
P
E S .010 (.25)
1
4
L A M J1
-D-
Notes: 1. Package dimensions conform to JEDEC specification MS-001-AB (issue B, 7/85) except for lead shape and size. 2. Controlling dimensions are inches. 3. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 4. D, E and F are reference datums on the molded body.
C
K
-F.004 (.10) J3 J2 J4 .010 (.25) M A S G H
PI-2077-050798
18
B 8/99
TNY256
Y07B
DIM A B D E F G H J K L M N O P Q R S T A1 A2 A3 A4 A5 A6 A7 A8
Plastic TO-220-7B
inches mm 11.86-12.37 10.16-10.54 3.71-3.96 2.74 REF. .66-.81 1.27 BSC 3.81 BSC 21.84-22.35 1.14-1.40 2.41-2.92 .38-.51 4.19-4.70 5.99-6.60 14.48 REF. 17.02 REF. 4.83-5.33 1.02-1.52 1.02-1.52 1.27 1.27 3.81 3.81 1.27 1.27 5.08 4.58 REF. D
B N K
.467-.487 .400-.415 .146 - .156 .108 REF. .026-.032 .050 BSC .150 BSC .860-.880 .045-.055 .095-.115 .015-.020 .165-.185 .236-.260 .570 REF. .670 REF. .190-.210 .040-.060 .040-.060 .050 .050 .150 .150 .050 .050 .200 .180 REF.
+
E
O
A J
7 TYP.
P
Q
L
PIN 1
PIN 1 & 7
PIN 4
F (Note 7) G M R
S T
H
A1 A2 A5 A6 A7
PIN 1
Notes: 1. Controlling dimensions are inches. 2. Pin numbers start with Pin 1, and continue from left to right when viewed from the top. 3. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15 mm) on any side. 4. Position of terminals to be measured at a position .25 (6.35 mm) below the package body. 5. All terminals are solder plated. 6. Pins 2 and 6 omitted. 7. .010 (.25) M
A8
PIN 7
A3
A4
MOUNTING HOLE PATTERN
PI-2374-040799
B 8/99
19
TNY256
Revision Notes A 1) TO-220-7B package information added. B 2) ILUV minimum increased to 44 to reflect production improvements. Date 3/99 8/99
For the latest updates, visit our website: www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein, nor does it convey any license under its patent rights or the rights of others. PI Logo and TOPSwitch are registered trademarks of Power Integrations, Inc. (c)Copyright 1999, Power Integrations, Inc. 477 N. Mathilda Avenue, Sunnyvale, CA 94086
WORLD HEADQUARTERS NORTH AMERICA - WEST Power Integrations, Inc. 477 N. Mathilda Avenue Sunnyvale, CA 94086 USA Main: +1*408*523*9200 Customer Service: Phone: +1*408*523*9265 Fax: +1*408*523*9365 KOREA Power Integrations International Holdings, Inc. Rm# 402, Handuk Building, 649-4 Yeoksam-Dong, Kangnam-Gu, Seoul, Korea Phone: +82*2*568*7520 Fax: +82*2*568*7474 NORTH AMERICA - EAST & SOUTH AMERICA Power Integrations, Inc. Eastern Area Sales Office 1343 Canton Road, Suite C1 Marietta, GA 30066 USA Phone: +1*770*424*5152 Fax: +1*770*424*6567 EUROPE & AFRICA Power Integrations (Europe) Ltd. Centennial Court Easthampstead Road Bracknell Berkshire RG12 1YQ, United Kingdom Phone: +44*1344*462*300 Fax: +44*1344*311*732 INDIA (Technical Support) Innovatech #1, 8th Main Road Vasanthnagar Bangalore 560052, India Phone: +91*80*226*6023 Fax: +91*80*228*9727 TAIWAN Power Integrations International Holdings, Inc. 2F, #508, Chung Hsiao E. Rd., Sec. 5, Taipei 105, Taiwan Phone: +886*2*2727*1221 Fax: +886*2*2727*1223
JAPAN Power Integrations, K.K. Keihin-Tatemono 1st Bldg. 12-20 Shin-Yokohama 2-Chome, Kohoku-ku, Yokohama-shi, Kanagawa 222, Japan Phone: +81*45*471*1021 Fax: +81*45*471*3717
APPLICATIONS HOTLINE World Wide +1*408*523*9260 APPLICATIONS FAX World Wide +1*408*523*9361
20
B 8/99


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